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# Graphene transistor based on tunable Dirac fermion optics

Edited by Tony F. Heinz, Stanford University, Stanford, CA, and accepted by Editorial Board Member Angel Rubio February 12, 2019 (received for review September 18, 2018)

## Significance

We report an electrically tunable graphene quantum switch based on Dirac fermion optics (DFO), with electrostatically defined analogies of mirror and collimators utilizing angle-dependent Klein tunneling. The device design allows a previously unreported quantitative characterization of the net DFO contribution and leads to improved device performance resilient to abrupt change in temperature, bias, doping, and electrostatic environment. The electrically tunable collimator and reflector demonstrated in this work, and the capability of accurate in situ characterization of their performance, provide the building blocks toward more complicated functional quantum device architecture such as highly integrated electron-optical circuits.

## Abstract

We present a quantum switch based on analogous Dirac fermion optics (DFO), in which the angle dependence of Klein tunneling is explicitly utilized to build tunable collimators and reflectors for the quantum wave function of Dirac fermions. We employ a dual-source design with a single flat reflector, which minimizes diffusive edge scattering and suppresses the background incoherent transmission. Our gate-tunable collimator–reflector device design enables the quantitative measurement of the net DFO contribution in the switching device operation. We obtain a full set of transmission coefficients between multiple leads of the device, separating the classical contribution from the coherent transport contribution. The DFO behavior demonstrated in this work requires no explicit energy gap. We demonstrate its robustness against thermal fluctuations up to 230 K and large bias current density up to 10^{2} A/m, over a wide range of carrier densities. The characterizable and tunable optical components (collimator–reflector) coupled with the conjugated source electrodes developed in this work provide essential building blocks toward more advanced DFO circuits such as quantum interferometers. The capability of building optical circuit analogies at a microscopic scale with highly tunable electron wavelength paves a path toward highly integrated and electrically tunable electron-optical components and circuits.

The linear energy–momentum dispersion, coupled with pseudospinors (1), makes graphene an ideal solid-state material platform to realize an electronic device based on Dirac-fermionic relativistic quantum mechanics. Employing local gate control, several examples of electronic devices based on Dirac fermion (DF) dynamics have been demonstrated, including Klein tunneling (2), negative refraction (3⇓–5), and specular Andreev reflection (6, 7).

While the depletion region of conventional semiconducting PN junction blocks the electronic transport across the junction, the gapless band structure of the graphene facilitates electrically adjustable PN junctions and enables electronic optics. The transmission probability (*T*) across the PN junction is unity for normal incident electrons due to the pseudospin conservation of DFs. This startling phenomenon known as Klein tunneling (8, 9) was first demonstrated in a graphene PNP junction (2). For the DFs with an oblique incident angle (θ), a PN junction exhibits Snell’s law like an electron beam path with a negative refraction medium (3⇓–5) for incoming Dirac electron wavefunctions. However, *T* is exponentially suppressed with θ as *T* ∼ exp[−π(*k*_{F}(*d*/2))sin^{2}θ] for the symmetric potential of P and N regions, where *k*_{F} is Fermi momentum and *d* is characteristic length scale of potential change across the junction (8, 9). A generalized equation for arbitrary junctions is in ref. 10. Depending on the value of *k*_{F}*d*, the junction can be transparent or reflective, a result that has been employed for electron waveguiding (11⇓⇓–14), beam splitting (15), Veselago lensing (4), and negative refraction (5) in graphene.

The strong angle dependence of Klein tunneling transmission *T* has been proposed to realize a type of switching device based on DF optics (DFO) (10, 14, 16⇓⇓–19). Fig. 1*A* shows a simple device scheme utilizing analogous electron optics. Here, a single-layer graphene channel is controlled by several local gates with predetermined shapes, dividing up electron-doped (N) and hole-doped (P) regions in the channel. The electrons leaving the source electrode pass through the first PN junction orthogonal to the channel direction. This PN junction filters out electrons with an oblique incident angle and collimates electron beams along the channel. The next PN junction, placed at an angle (∼45°), blocks the collimated electron beam due to the oblique incidence to the PN junction and reflects it along a path orthogonal to the original. However, in this simplistic device design, the reflected beam hitting the rough physical edge of the device would diffusively scatter (Fig. 1*A*), leading ultimately to a leakage current into the drain electrode. On top of that, multiple bounces of electrons in between collimator and reflector junctions contribute to the leakage current. To circumvent these diffusive edge scattering and multiple bouncing events, one may design the collimator–reflector to minimize the channel edge scattering. For example, a sawtooth-shaped top gate, which can create double reflections sending the incoming DF beam back to source electrode, has been theoretically conceived based on DFO (18, 20). The previous experimental study on such device architecture exhibited a signature of DFO behavior with the NP^{+}N/NPN on/off ratio of 1.3 (21). However, the definition and value of the on/off ratio can largely depend on the device operation scheme and other device specifics. Therefore, it can be challenging to use the on/off ratio as a universal and accurate metrics for quantifying the DFO contribution. The necessity for establishing device-independent methodology to measure the DFO contribution motivates us to develop a series of experimental designs that allow two independent methods of accurately characterizing DFO contribution.

In this work, we isolate the net DFO contribution from relativistic carriers and measure their full transmission coefficients in a dual-source design with a single flat reflector. The same device design also reduces diffusive scattering at edges and multiple bounces that are otherwise responsible for high off-state current leakage. Fig. 1*B* shows a schematic diagram of the proposed device and the overall operational procedure. When the central gate region (controlled by gate *V*_{2}) turns into the opposite carrier polarities of source and drain regions (controlled by gate *V*_{1}), carriers injected from each source will either reflect back to the same source (oblique incident angle) or travel ballistically to the other source contact (perpendicular incident angle). This collimation–reflection results in suppressed conduction between the source and the drain, and the device is in “off” state. When *V*_{1} and *V*_{2} are at the same polarity, the carriers flow ballistically to the drain, and the device is in “on” state. This device operation scheme has an advantage compared with the aforementioned single-source collimator–reflector scheme (Fig. 1*A*) or a sawtooth-shaped gate structure (18, 20, 21), as there is no significant channel edge contribution and only one reflection can be used for the off operation. Even with a nonideal reflector, we thus expect considerably enhanced DFO of the switch.

Fig. 1*B* shows electron microscope image of the local gates used for the dual-source device before the integration of graphene channel with two-source and one-drain electrodes in place. Switching operation of our device can be demonstrated by measuring two terminal resistance *R*_{T} between the drain electrode (1) and source electrodes (2 and 3). A common bias voltage *V*_{D} is applied to the source electrodes while the drain electrode is grounded. Two gate regions, collimation gates and the central gate, are controlled by applied gate voltages *V*_{1} and *V*_{2}, respectively. Fig. 1*C* shows the measured *R*_{T} as a function of *V*_{1} and *V*_{2}. The resistance map in (*V*_{1}, *V*_{2}) plane can be divided into four quadrants separated by the peak region of *R*_{T} ∼ 8 kΩ, corresponding to the charge neutral Dirac point, *V*_{1}, *V*_{2} ∼ 0. These four distinctive quadrants represent the source collimation/central gate/drain collimation regions in the NNN, NPN, PPP, and PNP regimes, respectively. We note that the NNN regime has the lowest resistance *R*_{T} of ∼500 Ω, while the PPP regime exhibits considerably larger resistance of ∼1.5 kΩ. In an ideal device, we expect a P/N symmetry in the device gate operation due to the particle–hole symmetry in the graphene band structure. However, the graphene channel can exhibit asymmetry in contact resistance due to the metal-induced contact doping (22), which prefers N channel to have lower contact resistance in our devices. The best device performance, therefore, is shown along the PNP–NNN regime, because there arise additional angled PN junctions between contacts and graphene in PNP (off) regime. Fig. 1*D* shows a slice cut of *R*_{T} along *V*_{1} at a fixed *V*_{2} = 5 V, crossing the PNP (off) to NNN (on) regimes. We choose this particular gate operation scheme for a pragmatic demonstration of a large on/off ratio achieved in our device, although the on/off ratio defined in this way contains not only the DFO contribution but also the contact and P/N junction resistance as we will below. To benchmark our experimental data, we perform semiclassical ray tracing simulation (5) utilizing a billiard model (23⇓–25) coupled with analytical Klein tunnelling equations at junctions (simulation details in *Methods*). For Fig. 1*D*, channel resistance (*R*_{ch}) is calculated from simulation and *R*_{C} (contact resistance) is calculated from Fig. 1*C* diagonal elements (*V*_{1} = *V*_{2}) (as for every *V*_{1} contact resistance is changing). Then total resistance, *R*_{T} = 2*R*_{C} + *R*_{ch}. To fit the off state (P/N/P), we include a random scattering angle around a specular trajectory (following a Gaussian distribution with SD σ_{e} = 15°) at the edges. Our analysis shows that on/off ratio degrades with increasing σ_{e} as it creates more and more states inside the transport gap. We emphasize that the switching operation based on our DFO does not require a “bandgap” in the channel material, since the device operation relies on Klein tunneling of DFs, which in turn keeps the high mobility of graphene intact in the on state and uses a gate-tunable transport gap for off state.

To realize complete collimation-filter DFO switch, alignment between the collimated beam and the reflected beam is necessary. Random scatterers in the channel can alter the propagation direction of the beam after collimation, directing beams with wrong incident angles to the reflector. Disorder will thus reduce the filtering efficiency of the collimator–reflector pair. We follow analysis similar to ref. 26 to probe the disorder-induced degradation of collimation-filter DFO switch. We first assign the resistance of single PN junction *R*_{J} in the diffusive transport limit, by summing over all incident angles to the junction (8). For completely diffusive transport, we can write the total resistance of the device as a sum of serially connected local resistances, including the contributions from the junction, contact, and graphene channels. In a ballistic graphene channel where the DFO collimation-filter switching is effective, we then expect the measured *R*_{T} to be substantially larger than the sum of all of the local resistance contributions (26).

We emphasize that the trivial PN junction resistances themselves contribute to the on/off as well; therefore, it is important to isolate the DFO contribution from *R*_{T}. We have implemented several crucial device designs that enabled us to isolate the DFO contribution from trivial background junction resistances. Specifically, independent control of carrier density in each gate region in our device design allows us to measure and eliminate the trivial resistance contributions from the collimator junctions (*R*_{J,1}) and the reflector junction (*R*_{J,2}) by using different gating schemes (*SI Appendix*, Fig. S1). As shown in Fig. 2, the collimation junction governs *R*_{T} in the gate configuration A, while the reflector junction governs *R*_{T} in the configuration B. Thus, *R*_{J,1} and *R*_{J,2} can be probed independently. In configuration A, the beam from the source crosses only the collimator junction before reaching the drain electrode. In this configuration, *R*_{T} is expressed as *R*_{T}(*V*_{1},*V*_{2}) = *R*_{C,1}(*V*_{1}) + *R*_{G,1}(*V*_{1}) + *R*_{J,1}(*V*_{1},*V*_{2}) + *R*_{G,2}(*V*_{2}) + *R*_{C,2}(*V*_{2}), where *R*_{C,1} and *R*_{C,2} represent the contact resistance of source and drain electrodes, respectively, and *R*_{G,1} and *R*_{G,2} do the graphene channel resistance of blue and green regions, respectively. Here, *R*_{J,1} is symmetric with exchanging *V*_{1} and *V*_{2}, *R*_{J,1}(*V*_{1},*V*_{2}) = *R*_{J,1}(*V*_{2},*V*_{1}), and vanishes when *V*_{1} = *V*_{2}, that is, *R*_{J,1}(*V*_{1},*V*_{1}) = 0. As a result, *R*_{J,1} can be expressed in terms of *R*_{T}: *R*_{J,1}(*V*_{1},*V*_{2}) = [*R*_{T}(*V*_{1},*V*_{2}) + *R*_{T}(*V*_{2},*V*_{1}) − *R*_{T}(*V*_{1},*V*_{1}) − *R*_{T}(*V*_{2},*V*_{2})]/2. Note that, in this expression, all of the terms of *R*_{C} values and *R*_{G} values are canceled out and *R*_{J,1} can be obtained from the measured *R*_{T} map. Similarly, *R*_{J,2} can be extracted from configuration B, where the beam goes through only the reflector junction in front of the drain electrode. Now when the beam from the source goes through both collimator and reflector junctions, we need to introduce an effective resistance *R*_{SJ}(*V*_{1},*V*_{2}), which describes the effect of the collimation-filtering. *R*_{T} in this situation (configuration C) can be written as *R*_{T}(*V*_{1},*V*_{2}) = *R*_{C,1}(*V*_{1}) + *R*_{G,1}(*V*_{1}) + *R*_{SJ}(*V*_{1},*V*_{2}) + *R*_{G,2}(*V*_{2}) + *R*_{C,2}(*V*_{1}); here, considering the electron–hole symmetry of the graphene channel, *R*_{2}(*V*_{2}) ∼ *R*_{2}(−*V*_{2}). We also assume a negligible series junction resistance in the unipolar regime, that is, *R*_{SJ}(*V*_{1},*V*_{2}) ∼ 0 for *V*_{1}⋅*V*_{2} > 0. Note that *R*_{SJ}(*V*_{1},*V*_{2}) becomes precisely zero for *V*_{1} = *V*_{2}. Summing up, we can rewrite *R*_{SJ} in terms of *R*_{T}: *R*_{SJ}(*V*_{1},*V*_{2}) = *R*_{T}(*V*_{1},*V*_{2}) − *R*_{T}(*V*_{1},−*V*_{2}) for *V*_{1}⋅*V*_{2} < 0.

Fig. 2 shows *R*_{J,1,} *R*_{J,2} and *R*_{SJ} as a function of *V*_{1} with a fixed voltage at *V*_{2} = −5 V. The finite *R*_{J,1} and *R*_{J,2} in the bipolar regime (*V*_{1} > 0) is a consequence of the reflected electrons at the PN junctions, whereas small value of *R*_{J} for *V*_{1} < 0 indicates that the junctions are transparent in the unipolar regime. We also plot *R*_{J,1} + *R*_{J,2} to compare with *R*_{SJ}. As we discussed above, if the DFO contribution exists, *R*_{SJ} would be larger than *R*_{J,1} + *R*_{J,2}. Indeed, as shown in Fig. 2, *R*_{SJ} is larger than *R*_{J,1} + *R*_{J,2} for *V*_{1} > 0.7 V, where the two PN junctions are well developed. *R*_{SJ} is larger than *R*_{J,1} + *R*_{J,2} for PNP regime as well (Fig. 2, *Inset*), directly confirming the DFO switching occurs at both polarities. In contrast, a control device of one-source geometry in Fig. 1*A* showed no difference between *R*_{SJ} and *R*_{J,1} + *R*_{J,2} for PNP regime, implying no DFO contribution (*SI Appendix*, Fig. S4).

We deliberately divided the source into two terminals and separated the injection and reflection paths to systematically characterize the DFO contribution by measuring the corresponding transmission coefficients. This measurement provides another independent metric for characterizing DFO contribution, consistent with our previous finding in Fig. 2. We analyze a full set of transmission coefficients *T*_{ij} between the *i*th and *j*th terminal in our device as a function of two gate voltages (*V*_{1},*V*_{2}). Note that the *i* and *j* indices can represent all three electrodes including two source and one drain electrodes. We employ a scattering matrix model in conjunction with the Landauer–Buttiker formalism to compute currents in all possible source–drain and gate configurations to determine *T*_{ij} (*SI Appendix*, Figs. S2 and S3). Fig. 3*A* shows *T*_{ij} as a function of *V*_{1} and *V*_{2}. The diagonal matrix elements (*i* = *j*) represent the fraction of carriers reflected back to the same electrode from which they were injected. In the absence of PN junctions (along with the diagonal line for *V*_{1} = *V*_{2}), the main contribution to the diagonal element *T*_{ii} represents the probability of carriers being reflected right back at the contact interface in their unsuccessful attempts of getting through. Therefore, 1 – *T*_{ii} is the contact transparency for the *i*th contact. We find each *T*_{ii} approaches 0.6 in the NNN regime, consistent with the contact transparency of ∼0.4 estimated in the two-terminal resistance (*SI Appendix*, Fig. S5).

The off-diagonal matrix elements of *T*_{ij} contain the quality of DFO switching. In particular, in the presence of PN junctions, we expect the *T*_{23} = *T*_{32} (source-to-source reflection) is maximized, and *T*_{12} and *T*_{13} (source-to-drain transmission) are minimized. To quantify the quality of the DFO switching, we define the relative transmission coefficients, *T*_{R} = 2*T*_{23}/(*T*_{12} + *T*_{13}). Fig. 3*B* shows *T*_{R} as a function of *V*_{1} and *V*_{2}. *T*_{R} is expected to be larger in the off regime, while it becomes smaller in the on regime. A horizontal line cut of *T*_{R} map in (*V*_{1}, *V*_{2}) plane at *V*_{2} = 5 V shows the evolution of *T*_{R} from the NPN regime to the NNN regime. The contact transparency along this line is kept high (>0.4) to minimize its influence on *T*_{R}. In the absence of PN junctions (NNN regime, *V*_{1} > 0), *T*_{R} is close to 1, and the injected currents from one of the source contacts are equally split toward the other two electrodes. However, when the PN junctions are established, Klein tunneling across the junction establishes a collimation–reflection effect, increasing *T*_{R} above the unity. Fig. 3*B* shows that *T*_{R} in the fully developed PNP regime can reach up to 1.4, indicating that DFO switching is effective. Near zero gate voltage (charge neutrality point), carrier motions becomes nonballistic due to the enhanced effect from disordered electron–hole puddles. In this regime, DFO picture breaks down and our method of extracting *T*_{R} becomes inaccurate. This leads to the strongly fluctuating values of *T*_{R} near *V*_{1} = 0 V.

Viewed as a transistor, our DFO switching device exhibits modestly low on/off ratio due to the absence of any energy gaps, and therefore due to the lack of carrier depletion and device insulation. Instead of bandgap, we have introduced a transport gap utilizing angle-dependent filtering by the collimator–reflector pair. This transport gap is robust against temperature variations or bias voltages with ideal edges for Klein tunneling. Even in the presence of diffusive edge scattering, it turns into a pseudogap with a nonzero floor. Thus, it provides stability of the device against temperature and bias voltages up to pseudogap range, which depends on gate voltages (16). The critical device parameters that govern the charge transport characteristics, including contact transparencies, Klein-tunneling probability, carrier densities, and quantum conductance for the channels are all insensitive to the temperature and applied bias voltage below critical values, presumably set by inelastic scattering processes. In the graphene channel with hBN, we expect such critical energy scale to be ∼100 meV, due to optical or substrate-induced phonons (27, 28). Fig. 4 shows the device characteristic with a wide range of bias currents (up to 150 mA) and temperatures (1.8–230 K). We indeed confirm the stability of the device performance over the entire measured range. The small change in *R*_{T} near the peak around *V*_{2} ∼ −1 V is due to the thermally excited electrons and holes across the Dirac point. However, the device characteristics for high values of |*V*_{2}| are not affected by operating temperatures up to 230 K and channel current density up to 10^{2} A/m, suggesting the robustness of DFO process in our device. Further quantitative experimental confirmation of the DFO contribution requires temperature-dependent evaluation of *R*_{SJ}/(*R*_{J,1} + *R*_{J,2}) and *T*_{R} in the future studies. We also demonstrate that the on/off device performance can be further improved by engineering the geometric shape of gate electrodes and optimizing DFO (*SI Appendix*, Fig. S6).

In conclusion, a quantum switch based on DFO has been investigated, utilizing angle dependence of Klein tunneling to realize optical analogies of the tunable collimator and reflector. Experimental evidence of DFO characteristics has been demonstrated and quantitatively characterized with two independent metrics by isolating the net DFO contribution to device resistance and by measuring a full set of transmission coefficients. Our analysis establishes multiple methodologies for the quantitative analysis of the DFO effect, leading to further device designing optimization (29, 30). The fully characterizable and tunable DFO collimator and reflector provide the foundations for future microscopic-scale electron-optical components, toward highly integrated and electrically controllable optical circuits with variable wavelength and functionality for device operation.

## Methods

### Sample Fabrication.

The local bottom gates were fabricated by electron beam lithography on SiO_{2} substrate with palladium–gold metallic alloy. Vacuum annealing of the metallic gates produces a surface roughness of ∼0.37 nm, which was limited by SiO_{2} substrate roughness. After fabrication of the local gates, a stack of hBN/graphene/hBN van der Waals heterostructure prepared by dry transfer technique (31) was transferred onto the local gates. The flat surface of the local gate ensures spatially uniform electrostatic gating, hence well-defined straight PN junctions. High-contact transparency of electrodes to the graphene is critical for our experiments as opaque contacts with low transparency would hinder electrons to enter or exit electrodes and lower the visibility of the electronic optical phenomena happening in the graphene channel. Here, we adopted an in situ etching technique (4, 32, 33) to achieve highly transparent contacts.

### Simulation Method.

Semiclassical ray tracing simulation considers electrons as noninteracting point particles with speed *v*_{F} and mass *m* = (*E*_{F} − *qV*)/*v*_{F}^{2} following classical trajectories (billiard model) (23⇓–25). Here, *v*_{F} is the Fermi velocity, *E*_{F} is the Fermi energy, and *q* is the electrical charge. This has been benchmarked against experiments on graphene PN junctions (5). Electrons are injected from the source at random angles, weighted by a cosine distribution (34). Away from PN junctions, the electron trajectories are calculated using classical laws of motion. At the junction, we estimate a fraction *T* of incident electrons that are transmitted and 1 – *T* reflected back. To calculate transmission *T*(*E*), we consider a generalized expression considering pseudospin conservation for angle dependent transmission across asymmetric PN junctions (10, 17). In this calculation, we use split distance between gates *d* = 60 nm, which is consistent with experimental data (∼50–80 nm from SEM and atomic force microscopy images). The contact *i*-to-contact *j* transmission *T*_{ij}(=*N*_{j}/*N*_{Total}) is obtained by counting the number of electrons (*N*_{j}) reaching the contact *j* divided by total number of injected electrons (*N*_{Total}) from contact *i*. Then terminal current *I* is calculated from Landauer–Buttiker formula by summing up the terminal transmissions.

## Acknowledgments

The experimental work and theoretical analysis were partly supported by INDEX, a funded center of Nanoelectronics Research Initiative, a Semiconductor Research Corporation program sponsored by Nanoelectronics Research Corporation and National Institute of Standards and Technology. P.K. acknowledges support from Office of Naval Research (ONR) Award N00014-16-1-2921 and the Lloyd Foundation. K. Wang acknowledges partial support from ONR Award N00014-15-1-2761. G.-H.L. acknowledges partial support from the National Research Foundation of Korea Grant funded by the Korean Government (Grant 2016R1A5A1008184). K. Watanabe and T.T. acknowledge support from the Elemental Strategy Initiative conducted by the Ministry of Education, Culture, Sports, Science and Technology, Japan, and Creating the Seeds for New Technology (Award JPMJCR15F3), Japan Science and Technology Agency.

## Footnotes

↵

^{1}Present address: Technology Computer Aided Design, Intel Corporation, Santa Clara, CA 95054.- ↵
^{2}To whom correspondence may be addressed. Email: lghman{at}postech.ac.kr or pkim{at}physics.harvard.edu.

Author contributions: K. Wang, L.W., J.H., A.W.G., G.-H.L., and P.K. designed research; K. Wang, L.W., and G.-H.L. performed research; L.W. contributed new reagents/analytic tools; K. Wang, M.M.E., L.W., K.M.M.H., A.W.G., G.-H.L., and P.K. analyzed data; K. Wang, M.M.E., L.W., K.M.M.H., T.T., K. Watanabe, J.H., A.W.G., G.-H.L., and P.K. wrote the paper; and T.T. and K. Watanabe provided hBN crystals.

The authors declare no conflict of interest.

This article is a PNAS Direct Submission. T.F.H. is a guest editor invited by the Editorial Board.

This article contains supporting information online at www.pnas.org/lookup/suppl/doi:10.1073/pnas.1816119116/-/DCSupplemental.

Published under the PNAS license.

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